RTL Design Engineer (RISC-V CPU)

Hsinchu Permanent
  • Leading provider of core IP and development tools
  • International Exposure with competitive salary package

About Our Client

My client is a US based company focusing on IP and development tools with office in US and TW.

Job Description

- Writing RTL and PSL or SVA code

- Setting up RTL design environment, tools, methodologies, and infrastructure.

- Working with verification engineers on testplans

- Designing and implementing ISA extensions in RISC-V CPU core.

The Successful Applicant

- Strong background in computer architecture and advanced knowledge of CPU.

- Strong experience in parameterized and configurable Verilog/ System Verilog coding. and experience with chip front-end design process including related 3rd-party RTL

What's on Offer

Highly competitive Salary

International exposure with tier 1 IC design house customer

Pierce Jen
Quote job ref
Phone number
+886 2 8729 8258

Job summary

Job function
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Contract Type
Consultant name
Pierce Jen
Consultant phone
+886 2 8729 8258
Job Reference